Introduction
HARTING offers signal integrity support to the end customers. We provide simulation models and evaluation kits with our products for signal integrity investigations. The evaluation kits are assembled with SMA‘s to connect them directly with the measurement instruments. The benefit is that the customer saves time and costs for pre-evaluation of the connector. We offer test boards suitable for the connector evaluation itself and have built reference backplanes and test cards for measurements within applications like VME, CompactPCI®, AdvancedTCA® and MicroTCA™. Reference structures and well established measurement techniques allow a full de-embedding of the propagation characteristics of the interconnect itself for test and verification. Furthermore we developed several high-speed test backplane with different connector areas and pcb design topologies. We can provide footprint and routing recommendations for our products. A variety of testboards, simulation models and further technical data for different products are available on request.
HARTING is also an active member in standardization groups like VITA, PICMG, OBSAI and supports sub-committees for new interconnect solutions. We are in close cooperation with customers, universities and industrial partners for research activities.
Signal integrity capabilities
Simulation and modeling
Measurement and verification
Test fixture & reference backplane design
Design-in support
Simulation and modeling
Capability to perform full 3D-FEM simulations of the CAD-geometry with different well established tools like CST Microwave Studio and Ansoft HFSS. Post-processing of the data for field-distribution and full S-parameter and time-domain analysis within the software packages themselves and additional Matlab tools.
For SPICE-modeling, impedance calculation and field distribution analysis of the geometry S-parameter models are used in combination with static 3D-FEM, 2D-FEM and planar field solvers depending on the desired bandwidth of the signal. These models are used as library parts for channel simulations including particular chip, trace, vias and connector subcircuits. Eye-diagram, S-parameter and waveform analysis of the entire channel are performed with tools like HSPICE and ADS (Advanced Design System).
Measurement and verification
Time-domain measurements
Parameters:
Characteristic impedance
Propagation delay
Rise time degradation
Reflection
Crosstalk
Eye-diagram and mask-test
Bit-error rate testing (BERT) up to 12.5 Gbps per differential line
Frequency-domain measurements
Parameters:
4 port S-parameter analysis (up to 40 GHz)
Insertion- and return loss, crosstalk, VSWR
Fourier-transformation, gating, error-location
PLTS software to calculated time-domain data, eye-diagrams, etc.
Test fixture & reference backplane design
Design-in support
Customized pcb design close to the real application
Footprint and routing recommendations
Full measurement characterization and test report
Simulation models
